Kernel-4.18.0-80.el8_sunxi-nan

Allwinner NAND Flash Controller (NFC)

Required properties:

• compatible : “allwinner,sun4i-a10-nand”.
• reg : shall contain registers location and length for data and reg.
• interrupts : shall define the nand controller interrupt.
• #address-cells: shall be set to 1. Encode the nand CS.
• #size-cells : shall be set to 0.
• clocks : shall reference nand controller clocks.
• clock-names : nand controller internal clock names. Shall contain :
  • “ahb” : AHB gating clock
  • “mod” : nand controller clock

Optional properties:

• dmas : shall reference DMA channel associated to the NAND controller.
• dma-names : shall be “rxtx”.

Optional children nodes:
Children nodes represent the available nand chips.

Optional properties:

• reset : phandle + reset specifier pair
• reset-names : must contain “ahb”
• allwinner,rb : shall contain the native Ready/Busy ids.
• nand-ecc-mode : one of the supported ECC modes (“hw”, “soft”, “soft_bch” or

      "none")
  

see Documentation/devicetree/bindings/mtd/nand.txt for generic bindings.

Examples:
nfc: nand@1c03000 {
compatible = “allwinner,sun4i-a10-nand”;
reg = <0x01c03000 0x1000>;
interrupts = <0 37 1>;
clocks = <&ahb_gates 13>, <&nand_clk>;
clock-names = “ahb”, “mod”;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = “default”;
pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;

nand@0 {
    reg = <0>;
    allwinner,rb = <0>;
    nand-ecc-mode = "soft_bch";
};

};