Samsung S5K5BAF UXGA 1/5” 2M CMOS Image Sensor with embedded SoC ISP
Required properties:
- compatible : “samsung,s5k5baf”;
- reg : I2C slave address of the sensor;
- vdda-supply : analog power supply 2.8V (2.6V to 3.0V);
- vddreg-supply : regulator input power supply 1.8V (1.7V to 1.9V)
or 2.8V (2.6V to 3.0);
- vddio-supply : I/O power supply 1.8V (1.65V to 1.95V)
or 2.8V (2.5V to 3.1V);
- stbyn-gpios : GPIO connected to STDBYN pin;
- rstn-gpios : GPIO connected to RSTN pin;
- clocks : list of phandle and clock specifier pairs
according to common clock bindings for the clocks described in clock-names;
- clock-names : should include “mclk” for the sensor’s master clock;
Optional properties:
- clock-frequency : the frequency at which the “mclk” clock should be
configured to operate, in Hz; if this property is not specified default 24 MHz value will be used.
The device node should contain one ‘port’ child node with one child ‘endpoint’
node, according to the bindings defined in Documentation/devicetree/bindings/
media/video-interfaces.txt. The following are properties specific to those
nodes.
endpoint node
- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
video-interfaces.txt. If present it should be <1> - the device supports only one data lane without re-mapping.
Example:
s5k5bafx@2d {
compatible = “samsung,s5k5baf”;
reg = <0x2d>;
vdda-supply = <&cam_io_en_reg>;
vddreg-supply = <&vt_core_15v_reg>;
vddio-supply = <&vtcam_reg>;
stbyn-gpios = <&gpl2 0 1>;
rstn-gpios = <&gpl2 1 1>;
clock-names = “mclk”;
clocks = <&clock_cam 0>;
clock-frequency = <24000000>;
port {
s5k5bafx_ep: endpoint {
remote-endpoint = <&csis1_ep>;
data-lanes = <1>;
};
};
};