Kernel-4.18.0-80.el8_rcar-pci

• Renesas R-Car PCIe interface

Required properties:
compatible: “renesas,pcie-r8a7743” for the R8A7743 SoC;
“renesas,pcie-r8a7779” for the R8A7779 SoC;
“renesas,pcie-r8a7790” for the R8A7790 SoC;
“renesas,pcie-r8a7791” for the R8A7791 SoC;
“renesas,pcie-r8a7793” for the R8A7793 SoC;
“renesas,pcie-r8a7795” for the R8A7795 SoC;
“renesas,pcie-r8a7796” for the R8A7796 SoC;
“renesas,pcie-r8a77980” for the R8A77980 SoC;
“renesas,pcie-rcar-gen2” for a generic R-Car Gen2 or
RZ/G1 compatible device.
“renesas,pcie-rcar-gen3” for a generic R-Car Gen3 compatible device.

    When compatible with the generic version, nodes must list the
    SoC-specific version corresponding to the platform first
    followed by the generic version.

• reg: base address and length of the PCIe controller registers.
• #address-cells: set to <3>
• #size-cells: set to <2>
• bus-range: PCI bus numbers covered
• device_type: set to “pci”
• ranges: ranges for the PCI memory and I/O regions.
• dma-ranges: ranges for the inbound memory regions.
• interrupts: two interrupt sources for MSI interrupts, followed by interrupt
  source for hardware related interrupts (e.g. link speed change).
• #interrupt-cells: set to <1>
• interrupt-map-mask and interrupt-map: standard PCI properties
  to define the mapping of the PCIe interface to interrupt numbers.
• clocks: from common clock binding: clock specifiers for the PCIe controller
  and PCIe bus clocks.
• clock-names: from common clock binding: should be “pcie” and “pcie_bus”.

Optional properties:

• phys: from common PHY binding: PHY phandle and specifier (only make sense
  for R-Car gen3 SoCs where the PCIe PHYs have their own register blocks).
• phy-names: from common PHY binding: should be “pcie”.

Example:

SoC-specific DT Entry:

pcie: pcie@fe000000 {
    compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
    reg = <0 0xfe000000 0 0x80000>;
    #address-cells = <3>;
    #size-cells = <2>;
    bus-range = <0x00 0xff>;
    device_type = "pci";
    ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
          0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
          0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
          0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
    dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000
              0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
    interrupts = <0 116 4>, <0 117 4>, <0 118 4>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0 0 0 0>;
    interrupt-map = <0 0 0 0 &gic 0 116 4>;
    clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>;
    clock-names = "pcie", "pcie_bus";
};