- Qualcomm Venus video encoder/decoder accelerators
- compatible:
Usage: required
Value type:
Definition: Value should contain one of:- "qcom,msm8916-venus" - "qcom,msm8996-venus" - reg:
Usage: required
Value type:
Definition: Register base address and length of the register map. - interrupts:
Usage: required
Value type:
Definition: Should contain interrupt line number. - clocks:
Usage: required
Value type:
Definition: A List of phandle and clock specifier pairs as listedin clock-names property. - clock-names:
Usage: required for msm8916
Value type:
Definition: Should contain the following entries:- "core" Core video accelerator clock - "iface" Video accelerator AHB clock - "bus" Video accelerator AXI clock - clock-names:
Usage: required for msm8996
Value type:
Definition: Should contain the following entries:- "core" Core video accelerator clock - "iface" Video accelerator AHB clock - "bus" Video accelerator AXI clock - "mbus" Video MAXI clock - power-domains:
Usage: required
Value type:
Definition: A phandle and power domain specifier pairs to thepower domain which is responsible for collapsing and restoring power to the peripheral. - iommus:
Usage: required
Value type:
Definition: A list of phandle and IOMMU specifier pairs. - memory-region:
Usage: required
Value type:
Definition: reference to the reserved-memory for the firmwarememory region.
- Subnodes
The Venus video-codec node must contain two subnodes representing
video-decoder and video-encoder.
Every of video-encoder or video-decoder subnode should have:
compatible:
Usage: required
Value type:
Definition: Value should contain “venus-decoder” or “venus-encoder”clocks:
Usage: required for msm8996
Value type:
Definition: A List of phandle and clock specifier pairs as listedin clock-names property.clock-names:
Usage: required for msm8996
Value type:
Definition: Should contain the following entries:- "core" Subcore video accelerator clockpower-domains:
Usage: required for msm8996
Value type:
Definition: A phandle and power domain specifier pairs to thepower domain which is responsible for collapsing and restoring power to the subcore.
An Example
video-codec@1d00000 {compatible = "qcom,msm8916-venus"; reg = <0x01d00000 0xff000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>, <&gcc GCC_VENUS0_AHB_CLK>, <&gcc GCC_VENUS0_AXI_CLK>; clock-names = "core", "iface", "bus"; power-domains = <&gcc VENUS_GDSC>; iommus = <&apps_iommu 5>; memory-region = <&venus_mem>; video-decoder { compatible = "venus-decoder"; clocks = <&mmcc VIDEO_SUBCORE0_CLK>; clock-names = "core"; power-domains = <&mmcc VENUS_CORE0_GDSC>; }; video-encoder { compatible = "venus-encoder"; clocks = <&mmcc VIDEO_SUBCORE1_CLK>; clock-names = "core"; power-domains = <&mmcc VENUS_CORE1_GDSC>; };};