NVIDIA Tegra186 MISC register block
The MISC register block found on Tegra186 SoCs contains registers that can be
used to identify a given chip and various strapping options.
Required properties:
- compatible: Must be:
- Tegra186: “nvidia,tegra186-misc”
- reg: Should contain 2 entries: The first entry gives the physical address
and length of the register region which contains revision and debug features. The second entry specifies the physical address and length of the register region indicating the strapping options.