Kernel-4.18.0-80.el8_marvell,icu

Marvell ICU Interrupt Controller

The Marvell ICU (Interrupt Consolidation Unit) controller is
responsible for collecting all wired-interrupt sources in the CP and
communicating them to the GIC in the AP, the unit translates interrupt
requests on input wires to MSG memory mapped transactions to the GIC.

Required properties:

• compatible: Should be “marvell,cp110-icu”

• reg: Should contain ICU registers location and length.

• #interrupt-cells: Specifies the number of cells needed to encode an
  interrupt source. The value shall be 3.

  The 1st cell is the group type of the ICU interrupt. Possible group
  types are:

  ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure
  ICU_GRP_SR (0x1) : Shared peripheral interrupt, secure
  ICU_GRP_SEI (0x4) : System error interrupt
  ICU_GRP_REI (0x5) : RAM error interrupt

  The 2nd cell is the index of the interrupt in the ICU unit.

  The 3rd cell is the type of the interrupt. See arm,gic.txt for
  details.

• interrupt-controller: Identifies the node as an interrupt
  controller.

• msi-parent: Should point to the GICP controller, the GIC extension
  that allows to trigger interrupts using MSG memory mapped
  transactions.

Example:

icu: interrupt-controller@1e0000 {
compatible = “marvell,cp110-icu”;
reg = <0x1e0000 0x10>;
#interrupt-cells = <3>;
interrupt-controller;
msi-parent = <&gicp>;
};

usb3h0: usb3@500000 {
interrupt-parent = <&icu>;
interrupts = <ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH>;
};