Kernel-4.18.0-80.el8_jz4780-dma

• Ingenic JZ4780 DMA Controller

Required properties:

• compatible: Should be “ingenic,jz4780-dma”
• reg: Should contain the DMA controller registers location and length.
• interrupts: Should contain the interrupt specifier of the DMA controller.
• interrupt-parent: Should be the phandle of the interrupt controller that
• clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
• #dma-cells: Must be <2>. Number of integer cells in the dmas property of
  DMA clients (see below).

Optional properties:

• ingenic,reserved-channels: Bitmask of channels to reserve for devices that
  need a specific channel. These channels will only be assigned when explicitly
  requested by a client. The primary use for this is channels 0 and 1, which
  can be configured to have special behaviour for NAND/BCH when using
  programmable firmware.

Example:

dma: dma@13420000 {
compatible = “ingenic,jz4780-dma”;
reg = <0x13420000 0x10000>;

interrupt-parent = <&intc>;
interrupts = <10>;

clocks = <&cgu JZ4780_CLK_PDMA>;

#dma-cells = <2>;

ingenic,reserved-channels = <0x3>;

};

DMA clients must use the format described in dma.txt, giving a phandle to the
DMA controller plus the following 2 integer cells:

1. Request type: The DMA request type for transfers to/from the device on
   the allocated channel, as defined in the SoC documentation.

2. Channel: If set to 0xffffffff, any available channel will be allocated for
   the client. Otherwise, the exact channel specified will be used. The channel
   should be reserved on the DMA controller using the ingenic,reserved-channels
   property.

Example:

uart0: serial@10030000 {
…
dmas = <&dma 0x14 0xffffffff
&dma 0x15 0xffffffff>;
dma-names = “tx”, “rx”;
…
};