Kernel-3.10.0-957.el7_omap-usb

OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS

OMAP MUSB GLUE

  • compatible : Should be “ti,omap4-musb” or “ti,omap3-musb”
  • ti,hwmods : must be “usb_otg_hs”
  • ti,has-mailbox : to specify that omap uses an external mailbox
    (in control module) to communicate with the musb core during device connect
    and disconnect.
  • multipoint : Should be “1” indicating the musb controller supports
    multipoint. This is a MUSB configuration-specific setting.
  • num-eps : Specifies the number of endpoints. This is also a
    MUSB configuration-specific setting. Should be set to “16”
  • ram-bits : Specifies the ram address size. Should be set to “12”
  • interface-type : This is a board specific setting to describe the type of
    interface between the controller and the phy. It should be “0” or “1”
    specifying ULPI and UTMI respectively.
  • mode : Should be “3” to represent OTG. “1” signifies HOST and “2”
    represents PERIPHERAL.
  • power : Should be “50”. This signifies the controller can supply upto
    100mA when operating in host mode.
  • usb-phy : the phandle for the PHY device

Optional properties:

  • ctrl-module : phandle of the control module this glue uses to write to
    mailbox

SOC specific device node entry
usb_otg_hs: usb_otg_hs@4a0ab000 {
compatible = “ti,omap4-musb”;
ti,hwmods = “usb_otg_hs”;
ti,has-mailbox;
multipoint = <1>;
num-eps = <16>;
ram-bits = <12>;
ctrl-module = <&omap_control_usb>;
};

Board specific device node entry
&usb_otg_hs {
interface-type = <1>;
mode = <3>;
power = <50>;
};

OMAP DWC3 GLUE

  • compatible : Should be “ti,dwc3”
  • ti,hwmods : Should be “usb_otg_ss”
  • reg : Address and length of the register set for the device.
  • interrupts : The irq number of this device that is used to interrupt the
    MPU
  • #address-cells, #size-cells : Must be present if the device has sub-nodes
  • utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
    It should be set to “1” for HW mode and “2” for SW mode.
  • ranges: the child address space are mapped 1:1 onto the parent address space

Sub-nodes:
The dwc3 core should be added as subnode to omap dwc3 glue.

  • dwc3 :
    The binding details of dwc3 can be found in:
    Documentation/devicetree/bindings/usb/dwc3.txt

omap_dwc3 {
compatible = “ti,dwc3”;
ti,hwmods = “usb_otg_ss”;
reg = <0x4a020000 0x1ff>;
interrupts = <0 93 4>;
#address-cells = <1>;
#size-cells = <1>;
utmi-mode = <2>;
ranges;
};

OMAP CONTROL USB

Required properties:

  • compatible: Should be “ti,omap-control-usb”
  • reg : Address and length of the register set for the device. It contains
    the address of “control_dev_conf” and “otghs_control” or “phy_power_usb”
    depending upon omap4 or omap5.
  • reg-names: The names of the register addresses corresponding to the registers
    filled in “reg”.
  • ti,type: This is used to differentiate whether the control module has
    usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to
    notify events to the musb core and omap5 has usb3 phy power register to
    power on usb3 phy. Should be “1” if it has mailbox and “2” if it has usb3
    phy power.

omap_control_usb: omap-control-usb@4a002300 {
compatible = “ti,omap-control-usb”;
reg = <0x4a002300 0x4>,
<0x4a00233c 0x4>;
reg-names = “control_dev_conf”, “otghs_control”;
ti,type = <1>;
};