Kernel-3.10.0-957.el7_fw-uploa

published: updated: Kernel_3.10.0-957.el7_内核文档

This document describes how to upload the cx2341x firmware to the card.

How to find

See the web pages of the various projects that uses this chip for information
on how to obtain the firmware.

The firmware stored in a Windows driver can be detected as follows:

  • Each firmware image is 256k bytes.
  • The 1st 32-bit word of the Encoder image is 0x0000da7
  • The 1st 32-bit word of the Decoder image is 0x00003a7
  • The 2nd 32-bit word of both images is 0xaa55bb66

How to load

  • Issue the FWapi command to stop the encoder if it is running. Wait for the
    command to complete.
  • Issue the FWapi command to stop the decoder if it is running. Wait for the
    command to complete.
  • Issue the I2C command to the digitizer to stop emitting VSYNC events.
  • Issue the FWapi command to halt the encoder’s firmware.
  • Sleep for 10ms.
  • Issue the FWapi command to halt the decoder’s firmware.
  • Sleep for 10ms.
  • Write 0x00000000 to register 0x2800 to stop the Video Display Module.
  • Write 0x00000005 to register 0x2D00 to stop the AO (audio output?).
  • Write 0x00000000 to register 0xA064 to ping? the APU.
  • Write 0xFFFFFFFE to register 0x9058 to stop the VPU.
  • Write 0xFFFFFFFF to register 0x9054 to reset the HW blocks.
  • Write 0x00000001 to register 0x9050 to stop the SPU.
  • Sleep for 10ms.
  • Write 0x0000001A to register 0x07FC to init the Encoder SDRAM’s pre-charge.
  • Write 0x80000640 to register 0x07F8 to init the Encoder SDRAM’s refresh to 1us.
  • Write 0x0000001A to register 0x08FC to init the Decoder SDRAM’s pre-charge.
  • Write 0x80000640 to register 0x08F8 to init the Decoder SDRAM’s refresh to 1us.
  • Sleep for 512ms. (600ms is recommended)
  • Transfer the encoder’s firmware image to offset 0 in Encoder memory space.
  • Transfer the decoder’s firmware image to offset 0 in Decoder memory space.
  • Use a read-modify-write operation to Clear bit 0 of register 0x9050 to
    re-enable the SPU.
  • Sleep for 1 second.
  • Use a read-modify-write operation to Clear bits 3 and 0 of register 0x9058
    to re-enable the VPU.
  • Sleep for 1 second.
  • Issue status API commands to both firmware images to verify.

oosTech by Sam Lee