OMAP Timer bindings
Required properties:
compatible: Should be set to one of the below. Please note that
OMAP44xx devices have timer instances that are 100% register compatible with OMAP3xxx devices as well as newer timers that are not 100% register compatible. So for OMAP44xx devices timer instances may use different compatible strings. ti,omap2420-timer (applicable to OMAP24xx devices) ti,omap3430-timer (applicable to OMAP3xxx/44xx devices) ti,omap4430-timer (applicable to OMAP44xx devices) ti,omap5430-timer (applicable to OMAP543x devices) ti,am335x-timer (applicable to AM335x devices) ti,am335x-timer-1ms (applicable to AM335x devices)
reg: Contains timer register address range (base address and
length).
interrupts: Contains the interrupt information for the timer. The
format is being dependent on which interrupt controller the OMAP device uses.
ti,hwmods: Name of the hwmod associated to the timer, “timer
“, where <X> is the instance number of the timer from the HW spec.
Optional properties:
- ti,timer-alwon: Indicates the timer is in an alway-on power domain.
- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
addition to the ARM CPU.
- ti,timer-pwm: Indicates the timer can generate a PWM output.
- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
and therefore cannot be used by the kernel.
Example:
timer12: timer@48304000 {
compatible = “ti,omap3430-timer”;
reg = <0x48304000 0x400>;
interrupts = <95>;
ti,hwmods = “timer12”
ti,timer-alwon;
ti,timer-secure;
};