Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
This controller has an optional ECC support in half-bus width (16-bit)
configuration. The ECC controller corrects one bit error and detects
two bit errors.
Required properties:
- compatible: Should be ‘xlnx,zynq-ddrc-a05’
- reg: Base address and size of the controllers memory area
Example:
memory-controller@f8006000 {
compatible = “xlnx,zynq-ddrc-a05”;
reg = <0xf8006000 0x1000>;
};
