Kernel-4.18.0-80.el8_sun6i-dma

Allwinner A31 DMA Controller

This driver follows the generic DMA bindings defined in dma.txt.

Required properties:

• compatible: Must be one of

      "allwinner,sun6i-a31-dma"
      "allwinner,sun8i-a23-dma"
      "allwinner,sun8i-a83t-dma"
      "allwinner,sun8i-h3-dma"
      "allwinner,sun8i-v3s-dma"
  

• reg: Should contain the registers base address and length
• interrupts: Should contain a reference to the interrupt used by this device
• clocks: Should contain a reference to the parent AHB clock
• resets: Should contain a reference to the reset controller asserting

    this device in reset
  

• #dma-cells : Should be 1, a single cell holding a line request number

Example:
dma: dma-controller@1c02000 {
compatible = “allwinner,sun6i-a31-dma”;
reg = <0x01c02000 0x1000>;
interrupts = <0 50 4>;
clocks = <&ahb1_gates 6>;
resets = <&ahb1_rst 6>;
#dma-cells = <1>;
};

---

For A64 DMA controller:

Required properties:

• compatible: “allwinner,sun50i-a64-dma”
• dma-channels: Number of DMA channels supported by the controller.

    Refer to Documentation/devicetree/bindings/dma/dma.txt
  

• all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells

Optional properties:

• dma-requests: Number of DMA request signals supported by the controller.

    Refer to Documentation/devicetree/bindings/dma/dma.txt
  

Example:
dma: dma-controller@1c02000 {
compatible = “allwinner,sun50i-a64-dma”;
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DMA>;
dma-channels = <8>;
dma-requests = <27>;
resets = <&ccu RST_BUS_DMA>;
#dma-cells = <1>;
};

---

Clients:

DMA clients connected to the A31 DMA controller must use the format
described in the dma.txt file, using a two-cell specifier for each
channel: a phandle plus one integer cells.
The two cells in order are:

1. A phandle pointing to the DMA controller.
2. The port ID as specified in the datasheet

Example:
spi2: spi@1c6a000 {
compatible = “allwinner,sun6i-a31-spi”;
reg = <0x01c6a000 0x1000>;
interrupts = <0 67 4>;
clocks = <&ahb1_gates 22>, <&spi2_clk>;
clock-names = “ahb”, “mod”;
dmas = <&dma 25>, <&dma 25>;
dma-names = “rx”, “tx”;
resets = <&ahb1_rst 22>;
};