Qualcomm QUSB2 phy controller
QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
Required properties:
compatible: compatible list, contains
"qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996, "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845.
reg: offset and length of the PHY register set.
#phy-cells: must be 0.
clocks: a list of phandles and clock-specifier pairs,
one for each entry in clock-names.
clock-names: must be “cfg_ahb” for phy config clock,
"ref" for 19.2 MHz ref clk, "iface" for phy interface clock (Optional).
vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals.
resets: Phandle to reset to phy block.
Optional properties:
nvmem-cells: Phandle to nvmem cell that contains ‘HS Tx trim’
tuning parameter value for qusb2 phy.
qcom,tcsr-syscon: Phandle to TCSR syscon register region.
qcom,imp-res-offset-value: It is a 6 bit value that specifies offset to be
added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY tuning parameter that may vary for different boards of same SOC. This property is applicable to only QUSB2 v2 PHY (sdm845).
qcom,hstx-trim-value: It is a 4 bit value that specifies tuning for HSTX
output current. Possible range is - 15mA to 24mA (stepsize of 600 uA). See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. This property is applicable to only QUSB2 v2 PHY (sdm845). Default value is 22.2mA for sdm845.
qcom,preemphasis-level: It is a 2 bit value that specifies pre-emphasis level.
Possible range is 0 to 15% (stepsize of 5%). See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. This property is applicable to only QUSB2 v2 PHY (sdm845). Default value is 10% for sdm845.
qcom,preemphasis-width: It is a 1 bit value that specifies how long the HSTX
pre-emphasis (specified using qcom,preemphasis-level) must be in effect. Duration could be half-bit of full-bit. See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. This property is applicable to only QUSB2 v2 PHY (sdm845). Default value is full-bit width for sdm845.
Example:
hsusb_phy: phy@7411000 {
compatible = “qcom,msm8996-qusb2-phy”;
reg = <0x7411000 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
<&gcc GCC_RX1_USB2_CLKREF_CLK>,
clock-names = "cfg_ahb", "ref";
vdda-pll-supply = <&pm8994_l12>;
vdda-phy-dpdm-supply = <&pm8994_l24>;
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
nvmem-cells = <&qusb2p_hstx_trim>;
};