Kernel-4.18.0-80.el8_mscc,ocelot-icpu-intr

Microsemi Ocelot SoC ICPU Interrupt Controller

Required properties:

• compatible : should be “mscc,ocelot-icpu-intr”
• reg : Specifies base physical address and size of the registers.
• interrupt-controller : Identifies the node as an interrupt controller
• #interrupt-cells : Specifies the number of cells needed to encode an
  interrupt source. The value shall be 1.
• interrupt-parent : phandle of the CPU interrupt controller.
• interrupts : Specifies the CPU interrupt the controller is connected to.

Example:

    intc: interrupt-controller@70000070 {
        compatible = "mscc,ocelot-icpu-intr";
        reg = <0x70000070 0x70>;
        #interrupt-cells = <1>;
        interrupt-controller;
        interrupt-parent = <&cpuintc>;
        interrupts = <2>;
    };