Kernel-4.18.0-80.el8_mediatek,mtk-xhci

MT8173 xHCI

The device node for Mediatek SOC USB3.0 host controller

There are two scenarios: the first one only supports xHCI driver;
the second one supports dual-role mode, and the host is based on xHCI
driver. Take account of backward compatibility, we divide bindings
into two parts.

1st: only supports xHCI driver

Required properties:

• compatible : should be “mediatek,-xhci”, “mediatek,mtk-xhci”,
  soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
  “mediatek,mtk-xhci” compatible string, you need SoC specific ones in
  addition, one of:

  • “mediatek,mt8173-xhci”

• reg : specifies physical base address and size of the registers

• reg-names: should be “mac” for xHCI MAC and “ippc” for IP port control

• interrupts : interrupt used by the controller

• power-domains : a phandle to USB power domain node to control USB’s
  mtcmos

• vusb33-supply : regulator of USB avdd3.3v

• clocks : a list of phandle + clock-specifier pairs, one for each
  entry in clock-names

• clock-names : must contain
  “sys_ck”: controller clock used by normal mode,
  the following ones are optional:
  “ref_ck”: reference clock used by low power mode etc,
  “mcu_ck”: mcu_bus clock for register access,
  “dma_ck”: dma_bus clock for data transfer by DMA

• phys : see usb-hcd.txt in the current directory

Optional properties:

• wakeup-source : enable USB remote wakeup;
• mediatek,syscon-wakeup : phandle to syscon used to access the register
  of the USB wakeup glue layer between xHCI and SPM; it depends on
  “wakeup-source”, and has two arguments:
  • the first one : register base address of the glue layer in syscon;
  • the second one : hardware version of the glue layer
    • 1 : used by mt8173 etc
    • 2 : used by mt2712 etc
• mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
  bit1 for u3port1, … etc;
• vbus-supply : reference to the VBUS regulator;
• usb3-lpm-capable : supports USB3.0 LPM
• pinctrl-names : a pinctrl state named “default” must be defined
• pinctrl-0 : pin control group
  See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
• imod-interval-ns: default interrupt moderation interval is 5000ns

additionally the properties from usb-hcd.txt (in the current directory) are
supported.

Example:
usb30: usb@11270000 {
compatible = “mediatek,mt8173-xhci”;
reg = <0 0x11270000 0 0x1000>,
<0 0x11280700 0 0x0100>;
reg-names = “mac”, “ippc”;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>,
<&pericfg CLK_PERI_USB0>,
<&pericfg CLK_PERI_USB1>;
clock-names = “sys_ck”, “ref_ck”;
phys = <&phy_port0 PHY_TYPE_USB3>,
<&phy_port1 PHY_TYPE_USB2>;
vusb33-supply = <&mt6397_vusb_reg>;
vbus-supply = <&usb_p1_vbus>;
usb3-lpm-capable;
mediatek,syscon-wakeup = <&pericfg 0x400 1>;
wakeup-source;
imod-interval-ns = <10000>;
};

2nd: dual-role mode with xHCI driver

In the case, xhci is added as subnode to mtu3. An example and the DT binding
details of mtu3 can be found in:
Documentation/devicetree/bindings/usb/mediatek,mtu3.txt

Required properties:

• compatible : should be “mediatek,-xhci”, “mediatek,mtk-xhci”,
  soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
  “mediatek,mtk-xhci” compatible string, you need SoC specific ones in
  addition, one of:

  • “mediatek,mt8173-xhci”

• reg : specifies physical base address and size of the registers

• reg-names: should be “mac” for xHCI MAC

• interrupts : interrupt used by the host controller

• power-domains : a phandle to USB power domain node to control USB’s
  mtcmos

• vusb33-supply : regulator of USB avdd3.3v

• clocks : a list of phandle + clock-specifier pairs, one for each
  entry in clock-names

• clock-names : must contain “sys_ck”, and the following ones are optional:
  “ref_ck”, “mcu_ck” and “dma_ck”

Optional properties:

• vbus-supply : reference to the VBUS regulator;
• usb3-lpm-capable : supports USB3.0 LPM

Example:
usb30: usb@11270000 {
compatible = “mediatek,mt8173-xhci”;
reg = <0 0x11270000 0 0x1000>;
reg-names = “mac”;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
clock-names = “sys_ck”, “ref_ck”;
vusb33-supply = <&mt6397_vusb_reg>;
usb3-lpm-capable;
};