HiSilicon STB xHCI
The device node for HiSilicon STB xHCI host controller
Required properties:
- compatible: should be “hisilicon,hi3798cv200-xhci”
- reg: specifies physical base address and size of the registers
- interrupts : interrupt used by the controller
- clocks: a list of phandle + clock-specifier pairs, one for each
entry in clock-names - clock-names: must contain
“bus”: for bus clock
“utmi”: for utmi clock
“pipe”: for pipe clock
“suspend”: for suspend clock - resets: a list of phandle and reset specifier pairs as listed in
reset-names property. - reset-names: must contain
“soft”: for soft reset - phys: a list of phandle + phy specifier pairs
- phy-names: must contain at least one of following:
“inno”: for inno phy
“combo”: for combo phy
Optional properties:
- usb2-lpm-disable: indicate if we don’t want to enable USB2 HW LPM
- usb3-lpm-capable: determines if platform is USB3 LPM capable
- imod-interval-ns: default interrupt moderation interval is 40000ns
Example:
xhci0: xchi@f98a0000 {
compatible = “hisilicon,hi3798cv200-xhci”;
reg = <0xf98a0000 0x10000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg HISTB_USB3_BUS_CLK>,
<&crg HISTB_USB3_UTMI_CLK>,
<&crg HISTB_USB3_PIPE_CLK>,
<&crg HISTB_USB3_SUSPEND_CLK>;
clock-names = “bus”, “utmi”, “pipe”, “suspend”;
resets = <&crg 0xb0 12>;
reset-names = “soft”;
phys = <&usb2_phy1_port1 0>, <&combphy0 PHY_TYPE_USB3>;
phy-names = “inno”, “combo”;
};
