Kernel-4.18.0-80.el8_aspeed_adc

Aspeed ADC

This device is a 10-bit converter for 16 voltage channels. All inputs are
single ended.

Required properties:

• compatible: Should be “aspeed,ast2400-adc” or “aspeed,ast2500-adc”
• reg: memory window mapping address and length
• clocks: Input clock used to derive the sample clock. Expected to be the

      SoC's APB clock.
  

• resets: Reset controller phandle
• #io-channel-cells: Must be set to <1> to indicate channels are selected

                 by index.
  

Example:
adc@1e6e9000 {
compatible = “aspeed,ast2400-adc”;
reg = <0x1e6e9000 0xb0>;
clocks = <&syscon ASPEED_CLK_APB>;
resets = <&syscon ASPEED_RESET_ADC>;
#io-channel-cells = <1>;
};