Kernel-4.18.0-80.el8_aspeed-wdt

Aspeed Watchdog Timer

Required properties:

• compatible: must be one of:

  • “aspeed,ast2400-wdt”
  • “aspeed,ast2500-wdt”

• reg: physical base address of the controller and length of memory mapped
  region

Optional properties:

• aspeed,reset-type = “cpu|soc|system|none”

  Reset behavior - Whenever a timeout occurs the watchdog can be programmed
  to generate one of three different, mutually exclusive, types of resets.

  Type “none” can be specified to indicate that no resets are to be done.
  This is useful in situations where another watchdog engine on chip is
  to perform the reset.

  If ‘aspeed,reset-type=’ is not specfied the default is to enable system
  reset.

  Reset types:

   - cpu: Reset CPU on watchdog timeout
  
   - soc: Reset 'System on Chip' on watchdog timeout
  
   - system: Reset system on watchdog timeout
  
   - none: No reset is performed on timeout. Assumes another watchdog
           engine is responsible for this.
  

• aspeed,alt-boot: If property is present then boot from alternate block.

• aspeed,external-signal: If property is present then signal is sent to

       external reset counter (only WDT1 and WDT2). If not
       specified no external signal is sent.
  

• aspeed,ext-pulse-duration: External signal pulse duration in microseconds

Optional properties for AST2500-compatible watchdogs:

• aspeed,ext-push-pull: If aspeed,external-signal is present, set the pin’s

        drive type to push-pull. The default is open-drain.
  

• aspeed,ext-active-high: If aspeed,external-signal is present and and the pin

          is configured as push-pull, then set the pulse
          polarity to active-high. The default is active-low.
  

Example:

wdt1: watchdog@1e785000 {
    compatible = "aspeed,ast2400-wdt";
    reg = <0x1e785000 0x1c>;
    aspeed,reset-type = "system";
    aspeed,external-signal;
};